LS1020AXN7MQB

NXP Semiconductors
841-LS1020AXN7MQB
LS1020AXN7MQB

Mfr.:

Description:
Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, -40 to 105C, Security disabled

ECAD Model:
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This product may require additional documentation to export from the United States.

Availability

Stock:
Non-Stocked
Factory Lead Time:
26 Weeks Estimated factory production time.
Long lead time reported on this product.
Minimum: 1   Multiples: 1
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:

Pricing (USD)

Qty. Unit Price
Ext. Price
$70.08 $70.08
$57.78 $577.80
$51.56 $1,289.00

Product Attribute Attribute Value Select Attribute
NXP
Product Category: Microprocessors - MPU
Delivery Restrictions:
 This product may require additional documentation to export from the United States.
RoHS:  
ARM Cortex A7
2 Core
32 bit
1.2 GHz
FCPBGA-525
32 kB
32 kB
1 V
LS1020A
SMD/SMT
- 40 C
+ 105 C
Tray
Brand: NXP Semiconductors
Data RAM Size: 128 kB
Instruction Type: Floating Point
Interface Type: Audio, Ethernet, PCI-e, Serial, USB
L2 Cache Instruction / Data Memory: 512 kB
Memory Type: DDR3L / DDR4 SDRAM
Number of I/Os: 109 I/O
Number of Timers/Counters: 8 Timer
Processor Series: QorIQ Layerscape LS1020A
Product Type: Microprocessors - MPU
Factory Pack Quantity: 84
Subcategory: Microprocessors - MPU
Tradename: QorIQ
Watchdog Timers: Watchdog Timer
Part # Aliases: 935334231557
Unit Weight: 1 g
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Attributes selected: 0

CNHTS:
8542319091
CAHTS:
8542310000
USHTS:
8542310045
TARIC:
8542319000
MXHTS:
8542310302
ECCN:
3A991.a.1

Layerscape Architecture

NXP Layerscape Architecture is the underlying system architecture of the QorIQ® LS series processors. The architecture enables next-generation networks with up to 100Gb/s performance and enhanced packet processing capabilities. Design effort is simplified with a standard, open programming model and a software-aware architecture framework. This design enables customers to fully exploit the underlying hardware for maximum optimization, with the capability to easily adapt to network changes for real-time soft control over the network. A uniform hardware and software model provides the compatibility and scalability required for designing end-to-end networking equipment from home-to carrier-class products. The core-agnostic architecture incorporates the optimum core for the given application: Arm® cores or Power Architecture® cores.