LS1084AXN7PTA

NXP Semiconductors
771-LS1084AXN7PTA
LS1084AXN7PTA

Mfr.:

Description:
Microprocessors - MPU 1400/1800 XT RvA

ECAD Model:
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This product may require additional documentation to export from the United States.

Availability

Stock:
Non-Stocked
Factory Lead Time:
26 Weeks Estimated factory production time.
Long lead time reported on this product.
Minimum: 60   Multiples: 60
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:
This Product Ships FREE

Pricing (USD)

Qty. Unit Price
Ext. Price
$185.36 $11,121.60

Product Attribute Attribute Value Select Attribute
NXP
Product Category: Microprocessors - MPU
Delivery Restrictions:
 This product may require additional documentation to export from the United States.
RoHS:  
ARM Cortex A53
8 Core
32 bit/64 bit
1.4 GHz
FCPBGA-780
32 kB
32 kB
1.025 V
LS1084A
SMD/SMT
- 40 C
+ 105 C
Tray
Brand: NXP Semiconductors
Data RAM Size: 128 kB
I/O Voltage: 1.2 V, 1.8 V, 2.5 V, 3.3 V
Interface Type: Ethernet, I2C, PCI-e, Serial, USB
L2 Cache Instruction / Data Memory: 1 MB, 1 MB
Memory Type: DDR4 SDRAM
Moisture Sensitive: Yes
Number of Timers/Counters: 4 Timer
Processor Series: QorIQ Layerscape LS1088A
Product Type: Microprocessors - MPU
Factory Pack Quantity: 60
Subcategory: Microprocessors - MPU
Tradename: QorIQ
Watchdog Timers: Watchdog Timer
Part # Aliases: 935361158557
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Attributes selected: 0

CNHTS:
8542319091
USHTS:
8542310045
TARIC:
8542319000
ECCN:
5A002.a.1

Layerscape Architecture

NXP Layerscape Architecture is the underlying system architecture of the QorIQ® LS series processors. The architecture enables next-generation networks with up to 100Gb/s performance and enhanced packet processing capabilities. Design effort is simplified with a standard, open programming model and a software-aware architecture framework. This design enables customers to fully exploit the underlying hardware for maximum optimization, with the capability to easily adapt to network changes for real-time soft control over the network. A uniform hardware and software model provides the compatibility and scalability required for designing end-to-end networking equipment from home-to carrier-class products. The core-agnostic architecture incorporates the optimum core for the given application: Arm® cores or Power Architecture® cores.