LMK5C33216RGCT

Texas Instruments
595-LMK5C33216RGCT
LMK5C33216RGCT

Mfr.:

Description:
Clock Synthesizer/Jitter Cleaner Ultra-low jitter clo ck synchronizer wit A 595-LMK5C33216RGCR

Datasheet:
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In Stock: 235

Stock:
235 Can Dispatch Immediately
Factory Lead Time:
18 Weeks Estimated factory production time for quantities greater than shown.
Quantities greater than 235 will be subject to minimum order requirements.
Minimum: 1   Multiples: 1
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 250)

Pricing (USD)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
$61.53 $61.53
$50.77 $507.70
$48.10 $1,202.50
$45.15 $4,515.00
Full Reel (Order in multiples of 250)
$43.80 $10,950.00
500 Quote
† A MouseReel™ fee of $7.00 will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Clock Synthesizer/Jitter Cleaner
RoHS:  
16 Output
3 GHz
CML, LVCMOS, LVDS, LVPECL
HCSL, LVCMOS, LVDS, LVPECL, XTAL
VQFN-64
800 MHz
3.135 V
3.465 V
- 40 C
+ 85 C
LMK5C33216
SMD/SMT
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
Development Kit: LMK5C33216EVM
Moisture Sensitive: Yes
Operating Supply Current: 875 mA
Product: Clock Synthesizers / Jitter Cleaners
Product Type: Clock Synthesizers / Jitter Cleaners
Factory Pack Quantity: 250
Subcategory: Clock & Timer ICs
Type: Clock Network Synchronizer
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Attributes selected: 0

Datasheet

Application Notes

PCN

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CNHTS:
8542399000
USHTS:
8542390090
ECCN:
EAR99

LMK5C33216 Ultra-Low Jitter Clock Synchronizer

Texas Instruments LMK5C33216 Ultra-Low Jitter Clock Synchronizer is a high-performance network clock generator, synchronizer, and jitter attenuator. It comes with advanced reference clock selection and hitless switching capabilities designed to meet the stringent requirements of communications infrastructure applications. The LMK5C33216 integrates 3 DPLLs with programmable loop bandwidth and no external loop filters, maximizing flexibility and ease of use. Each DPLL phase locks a paired APLL to a DPLL reference input. The APLL reference determines the long term frequency accuracy.

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