AD9546 Dual DPLL Digitized Clock Synchronizer

Analog Devices Inc. AD9546 Dual DPLL Digitized Clock Synchronizer combines digitized clocking technology that efficiently transports and distributes clock signals in systems. Digitized clocking on the AD9546 allows the design of flexible and scalable clock transport systems with well-controlled phase (time) alignment. The AD9546 is ideal for the design of network equipment that must meet the synchronization requirements for IEEE® 1588™ boundary clocks per ITU-T G.8273.2 Class D. Additionally, digitized clocking is also relevant in applications requiring the accurate transport of frequency and phase to multiple usage endpoints, such as, distributing synchronized system reference (SYSREF) clocks to an array of ADC channels.

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Select Image Part # Mfr. Description Datasheet Availability Pricing (USD) Filter the results in the table by unit price based on your quantity. Qty. RoHS ECAD Model Number of Outputs Max Output Freq Output Level Input Level Package/Case Supply Voltage - Min Supply Voltage - Max Minimum Operating Temperature Maximum Operating Temperature Mounting Style Packaging
Analog Devices Clock Synthesizer/Jitter Cleaner Dual DPLL Digitized Clock Synchronizer 636In Stock
Min.: 1
Mult.: 1

10 Output 500 MHz CML, HCSL, LVDS Differential, Single-Ended LFCSP-48 1.7 V 1.89 V - 40 C + 85 C SMD/SMT Tray
Analog Devices Clock Synthesizer/Jitter Cleaner Jitter clean +/PPS + Small Cell Clock Non-Stocked Lead-Time 10 Weeks
Min.: 750
Mult.: 750
Reel: 750

10 Output 500 MHz CML, HCSL, LVDS Differential, Single-Ended LFCSP-48 1.7 V 1.89 V - 40 C + 85 C SMD/SMT Reel