Samtec Signal Integrity for HP System Design

Samtec Signal Integrity for High-Performance (HP) System Design ensures signal transmission with sufficient quality for effective communication. Signal integrity applies to baseband signals transmitted using interconnects such as cables, Printed Circut Board (PCB) trace, or transmission lines. Interconnect solutions that support bleeding edge speeds are necessary for next-generation high-performance systems. Factors such as crosstalk, return loss, insertion loss, and Electromagnetic Interference (EMI) can significantly determine the optimal interconnect solution for a given application. The signal integrity for high-performance system design has to overcome various challenges, including attenuation along the signal path.

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Samtec Signal Integrity for HP System Design

High-speed links in the data center and compute environment have used two voltage levels in signaling known as Non-Return to Zero (NRZ) or Pulse Amplitude Modulation 2-level (PAM2). Here low voltage represents binary 0, and high voltage represents binary 1.

Samtec Signal Integrity for HP System Design

S-parameters are a unified set of frequency-domain performance characteristics that can be used to define an electrical device's properties completely. S-parameters can be generated from a simulation or measured with a Vector Network Analyzer (VNA). The number of ports determines the number of available S-parameters for characterizing a specific electrical device. S-parameter models may be used to make performance charts, and numerous SI characteristics can be extracted, including insertion loss, return loss, and crosstalk.

Samtec Signal Integrity for HP System Design

Analysis in the time domain reveals the pertinent behavior of an interconnect and is specific to a given data rate. Time domain analysis provides spatial resolution and can inform about the behavior at every location throughout the topology.

Impedance (Ω) is a measure of the behavior of the interconnect. It is influenced by the signal conductor and reference conductor surface area, the gap between them, and the material's dielectric properties. 

Propagation delay is the time it takes for a signal to propagate through an interconnect path and Skew is the difference in propagation delay between multiple wires.

Rise time is the rate at which a signal changes from low to high and it is usually defined between 10% and 90% (or 20 and 80%) of the total voltage range. Dispersion is the signal spread due to changes in propagation delay across frequencies in PCB dielectrics.

Samtec Signal Integrity for HP System Design

An assessment of the SI performance of the complete channel design during the system design phase is required before developing a physical prototype. To support this system-level assessment, a design team needs electrical simulation models, usually S-parameters, and a particular physical protocol and topology expectation to execute channel simulation. Channel simulation requires product eye diagrams, Channel Operating Margin (COM) results, or Bit Error Ratio (BER).

An eye diagram is a characterization of system-level performance. Eye patterns are generated by sending continuous data streams from a transmitter to a receiver and overlaying the received bits upon one another. Over time, the received data build to resemble an eye.

COM is a figure of merit for a channel derived from measuring the scattering parameters. It relates to the ratio of a calculated signal amplitude to a calculated noise amplitude at a receiver input.

Samtec Signal Integrity for HP System Design

Open-pin-field signals offer the impressive flexibility to place signals, grounds, or power anywhere. Selections with assigned signals usually have superior SI performance due to specially designed ground structures. Cabled connectors may also be assigned positions to properly connect the Twinax ground shield. Many parameters critical to high-speed connector performance will vary significantly depending on the pin assignment and form factor. An open-pin-field connector will have improved crosstalk performance when two grounds are placed between signals (SSGGSS) compared to a single ground (SSGSS).

A design with a smaller pitch may favor system placement because of its greater density; however, performance could be reduced as higher crosstalk is incurred due to proximity. This is not always true due to innovative designs, so it is critical to refer to SI characterization reports to make the best decisions.

Published: 2023-04-13 | Updated: 2024-07-09