Texas Instruments SN74LVC2G08/-Q1/-EP Dual Positive-AND Gates
Texas Instruments SN74LVC2G08/-Q1/-EP Dual 2-Input Positive-AND Gates are designed for 1.65V to 5.5V VCC operation. In positive logic, the SN74LVC2G08/-Q1/-EP Gates perform the Boolean function Y = A • B or Y = A + B.
The TI SN74LVC2G08/-Q1/-EP Dual 2-Input Positive-AND Gates is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The SN74LVC2G08-Q1 devices are AEC-Q100 qualified for automotive applications. The SN74LVC2G08-EP devices have gold bond wires, a temperature range of -55 to +105°C, and an SnPb lead finish.
Features
- AEC-Q100 Qualified with the following results
- Device temperature grade 1 of -40°C to +125°C ambient operating temperature range (DCU package)
- Device temperature grade 3 of -40°C to +85°C ambient operating temperature range (DCT package)
- Supports 5V VCC operation
- Inputs accept voltages to 5.5V
- Low power consumption, 10μA max ICC
- ±24mA output drive at 3.3V
- Ioff supports partial-power-down mode operation
- It can be used as a down translator to translate input from a maximum of 5.5V down to the VCC level
- Latch-up performance exceeds 100mA Per JESD 78, Class II
Applications
- Combine power good signals for multiple power rails
- Prevent a signal from being passed until a condition is true
- Combine active-low error signals
Logic Diagram (Positive Logic)
Development Tool
Texas Instruments 5-8-LOGIC-EVM Evaluation Module
Developed to support leaded Logic devices in the DBV, DCK, DCT, DCU, and DRL packages.
Datasheets
Published: 2020-12-29
| Updated: 2025-03-10