Texas Instruments SN74SSTUB32866 Configurable Registered Buffers
Texas Instruments SN74SSTUB32866 Configurable Registered Buffers adjust to 25-bit 1:1 or 14-bit 1:2 and are designed for 1.7V to 1.9V VCC operation. The 1:1 pinout configuration requires only one device per DIMM to drive nine SDRAM loads, while the 1:2 pinout configuration requires two devices per DIMM to drive 18 SDRAM loads.
All inputs are SSTL_18, except the reset (RESET) and control (Cn) inputs, which are LVCMOS. All outputs are edge-controlled circuits optimized for unterminated DIMM loads and meet SSTL_18 specifications, except the open-drain error (QERR) output. The TI SN74SSTUB32866 Configurable Registered Buffers operates from a differential clock (CLK and /CLK). The data is registered at the crossing of CLK going high and CLK going low.
Features
- Member of the Texas Instruments Widebus+™ family
- Pinout optimizes DDR2 DIMM PCB layout
- Configurable as 25-bit 1:1 or 14-bit 1:2 registered buffer
- Chip-select inputs gate the data outputs from changing state and minimize system power consumption
- Output edge-control circuitry minimizes switching noise in an unterminated line
- Supports SSTL_18 data inputs
- Differential clock (CLK and CLK) inputs
- Supports LVCMOS switching levels on the control and RESET inputs
- Checks parity on DIMM-Independent data inputs
- Able to cascade with a second SN74SSTUB32866
- Supports industrial temperature range (-40°C to 85°C)
Published: 2020-12-21
| Updated: 2024-10-24